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Event Information:

• Introduction

  Introduction

  The first part of the CDG2000 appeared in RadCom in the June 2002 edition. An earlier version of the paper is presented here.

  Return to CDG2000 home page

   

  The CDG2000 High Performance Transceiver (Part 1)

   

  A design by Colin Horrabin G3SBI, Dave Roberts G8KBB and George Fare G3OGQ

  (Hence CDG2000)

  INTRODUCTION

   

  This series of articles will present a design for a high performance HF transceiver or more correctly a high performance receiver with a fairly standard transmit capability.

  The design of an HF transceiver today cannot easily be performed by one person. In particular, although RF considerations must predominate, expertise in computer hardware and software as well as digital circuitry, is essential. Thus a team of three was formed, each with their own expertise, with a desire to design a transceiver with performance at least equal to the best commercial amateur transceiver currently on the market and one which could be reproduced by an experienced amateur constructor.

  We do not claim that this is the last word in analogue circuitry. That, most definitely, it is not; in spite of those who say that analogue circuitry is dead. It is however designed to offer the best performance we could achieve with a design that is reproducible, and on a practical note, its modularity lends itself to replacement of modules with others as time progresses. Unlike many commercial transceivers, it does not offer unlimited bells and whistles, many of which, on inspection, appear to be no more than sales gimmicks, but we have included those features that we consider to enhance operation. What it does do is to beat the pants off most of them in regard to performance. Receive IP3 (third order intercept) is about +40dBm. Noise figure is around 10dB. On SSB, 10dB(S+N)/N is about 0.22uV (-120dBm). Its oscillator phase noise levels and close in performance achieve -140 dBc/Hz at 9KHz offset from carrier and -150 dBc/Hz at just over 20 kHz on the 20 metre band.

  We do not expect that many people will want to make a complete Chinese copy. It is not intended for other than experienced amateurs. If your motive in home construction is to save money, then this design is not for you, but if you want the best performance possible at the present state of the art at a price less than commercial rigs, then this may be of use to you. If you take only a couple of ideas for your own design, we suggest that you look to the synthesiser and the front end.

  In this series we will present some of the modules. These include the Front End Board, Post Mixer Amplifier, IF Amplifier, Synthesiser and Controller. Those modules that do not appear will be made available on the Warrington Amateur Radio Club web site [1]. A CDROM will also be made available by the authors.

  In this introductory part, we will discuss the system design and present an overview of the main elements. The aim is to achieve excellence in a modular fashion so that as new techniques become available (and affordable) they can readily be incorporated in the transceiver, enhancing performance or improving operating convenience.

  PHILOSOPHY OF DESIGN

  There is no doubt that the fairly near future will see the introduction of all-digital amateur designs, but a study of current �state of the art� designs rules them out on grounds of performance. Doubtless in years to come, digital design will catch up with analogue design and economic grounds will ensure its adoption. It is clear that the designs most of us grew up with are now far removed from the current state of the art design as is evident from recent Technical Topics articles.

  It was therefore decided to produce a predominantly analogue design but with computer controlled functions and digital audio circuitry.

  Most high performance receivers today feature multiple conversion with a high first intermediate frequency. This is very cost effective, reducing the need for good band pass filtering in the front end and improving image rejection. However, multiple intermediate frequencies mean multiple oscillators, each with their own noise problem etc, leading to the production of �birdies� and intermodulation distortion. We therefore decided to adopt a conventional single conversion superhet with a fairly low intermediate frequency but using a synthesiser running at VHF, divided down. This technique has the advantage of reducing phase noise and avoids the use of multiple VCOs. It was also decided that the best performance would be achieved by limiting the range to the amateur bands only.

  Initial work concentrated on the receiver design as a great deal of the circuitry would be common to the transmitter. It would be true to say that the receiver is the main part of the design, and that the performance of the receiver has been the main focus � the transmit chain is a bit of an add-on, but nevertheless benefits from the common use of the mixer, synthesiser and band pass filters.

  Particular Design Goals

  The design was to meet the following goals on receive:

   

  • ����������� IP3 point to be as high as possible.
  • ����������� Noise figure to be as low as possible so long as it does not compromise IP3 performance
  • ����������� Coverage of amateur bands only so as to maximise signal-handling performance.
  • ����������� Close in performance (sideband noise, filters, IP3) to be as good as possible
  • ����������� Frequency stability to be derived from a stable source.

  The performance achieved, in brief, is as follows; and we welcome comparison with equipment reviews that have appeared in RadCom:

  Measurements indicate an IP3 in the region of +40 dBm. This performance is maintained for close in signals. It is limited in part not by the mixer but by the coils in the band pass filters, being up to 13dB better for hand wound coils than for commercial inductors. Details of both methods will be given. IP3 degrades slightly for CW signals with an offset of less than 2 kHz due to the post roofing filter amplifier. With an IP3 of +40dBm it is likely that the 1dB compression point is about +25dBm.

  The noise figure is around 10dB, varying slightly from band to band. On SSB this gives a noise floor of (-174+10*log(2200)+10)dBm, or �130dBm [3]. With an IP3 of +40dBm and a noise floor of �130 dBm, this gives an IP3 dynamic range of 113dB using the formula: IP3 DR = 2/3*(IP3-MDS).

  Sideband noise of the VCO varies by band due to the use of programmable dividers. On 14 Mhz it measures -140 dBc/Hz at an offset of 9 kHz, and -150dBc/Hz at an offset of 22kHz. Detailed performance figures are contained in Table 1 and in Figure 3.

  In respect of local oscillator leakage from the antenna socket, the transceiver performance is comfortably within the relevant limits defined in CEPT/ERC/REC 74-01 and ETSI specification ETC 300-684. The requirement is �57 dBm and the worst case measurement which occurs at 29 MHz is -90 dBm with the best case being �108 dBm at 18.1 MHz.

  How good a performance is needed? Tests by members of the RSGB Technical & Publications Committee suggest that in normal usage, an amateur is unlikely to require a receiver with a spurious free dynamic range (SFDR) exceeding 95dB. The design presented here is 15dB better than this. It may be that this is more than is normally needed but gives some margin for future proofing or for more onerous situations such as where adjacent signals at a higher level than normally found are encountered. In this regard, local oscillator noise leading to reciprocal mixing is more troublesome than pure IMD performance and the design presented also achieves very good phase noise performance. Subjective comparisons demonstrated at the Warrington Amateur Radio Club reveal that it performs better than most current commercial designs even under normal band conditions.

  Finally, a plot of the Signal to Noise ratio against input signal level is shown in Figure 2. This was measured at 14.220 MHz.

  Block Diagram������

  Figure 1 shows the block diagram of the complete transceiver as at present designed, which looks deceptively simple. Each block represents a module, all of which are built on the same size board except the front end. A more detailed explanation of each function will be given with the description of each module.

  Tracing the receive path first, the signal from the antenna is fed to an antenna changeover relay and applied to the front end board. This is instead of feeding the signal through the low pass filter board which is used in transmit only to avoid any attenuation due to ripple in the passband of the low pass filters. The signal is then applied to an attenuator which can be switched to give 0, 6, 12 or 18 dB attenuation by means of two relays. Where the extreme sensitivity of the receiver is not required, attenuation provides even better IP3 performance. A 9 MHz trap follows which helps to attenuate signals at the intermediate frequency.

  The nine band pass filters which follow are identical in design except for those covering the 10, 18 and 24 MHz bands. All are relay switched with DC wetted contacts. Diode switching in the RF path is not an option in this transceiver as relay switching provides superior IMD performance.

  The mixer following is the H mode mixer developed by G3SBI [2] and is fed by the local oscillator signal divided by two. After the mixer, the signal is divided into the receive/transmit path. The received signal is fed to a diplexer and then to the roofing filter which is actually two filters fed 90 degrees out of phase with a hybrid combiner at each end.

  Following the front end board, the signal, now at 9 MHz is fed to the post mixer amplifier board which has a four FET amplifier with a gain of about 14 dB. The main filters are on this board, one for SSB and one for CW

  You will note that there is no amplifier before the roofing filter and no AGC signal external to the IF unit.

  The filtered signal then goes to the IF amplifier board which is the excellent design of Bill Carver, W7AAZ[6], modified to fit on a Eurocard size 160 x 100 mm, common to all modules except the front end. A noise filter is fitted between the second and third amplifier stages. AGC is derived on this board and applied to the IF amplifiers. The S meter is also driven from this board but the level is altered by the control board to reflect changes in sensitivity following switched in attenuators, changes in gain with band etc, all of which can show a difference in signal strength when, of course, none exists.

  The product detector, a double balanced diode mixer is part of the next board which also incorporates the transmit exciter.

  The resultant audio signal is then fed to the DSP board where noise reduction takes place, followed by the audio amplifier. The DSP is a reboxed commercial unit for which no information will be given. An alternative that combines receive and transmit DSPs with DDS generation of the transmit signal is under construction.

  The local oscillator signal is derived from a very low phase noise synthesiser which runs at 46 to 78 MHz. The VCO is a novel two-tank oscillator by Colin Horrabin, developed further by John Thorpe for his excellent AOR7030 design. To understand the operation of the synthesiser consider, as an example, how a local oscillator signal for the 1.8 MHz band is generated. For 1.8 MHz, we require a local oscillator frequency of 10.8 MHz (1.8 + 9 MHz). This frequency is applied to the mixer after the divide by 2 IC on the front end board. We therefore need a synthesiser output of 21.6 MHz. Our VCO covers 46 to 78 MHz so in order to generate a 21.6 MHz signal we need to produce a VCO signal at 64.8 MHz and then divide by 3. The VCO frequency is divided by 512 in a phase locked loop and the resultant frequency of 126.5625 kHz is compared with a similar frequency from the DDS when the loop will lock. The synthesiser is controlled by a DDS reference derived from the control board. This control board is based on a high-end PIC micro, the PIC17C766. It controls all functions of the transceiver by means of switched power, an I2C bus and a separate DDS bus. It provides an on screen �S� and power meter, remote control and enough processing power to update the display without compromising tuning.

  The transmit path shares many of the circuits of the receive path.

  The 9 MHz BFO signal is keyed in the transmit exciter board for CW operation, an automatic keyer function being included in the control unit. For SSB, the microphone signal is fed through an optional speech processor to the transmit exciter board which also includes the VOX circuitry.

  The DSB signal from the balanced modulator is fed to the pre driver board which also includes the SSB filter, and ALC controlled amplifier. Following this board, the signal, either CW or SSB is fed to the H mode mixer on the front end board, through the band pass filters and thence to the PA.

  The PA is either a 15W Hands Electronics AMP1[4] or a 20W amplifier using a Motorola AN779H module[5].

  Traditional low pass filters follow the PA and this board also provides the forward and reverse voltages to feed the ALC circuit.

  Generally

  There is no �this is it� aspect to the design � we all have different tastes. Three transceivers have been built, one by each of the design team and all differ according to individual taste. What they have in common is the use of identical modules.

  Further development proceeds. For instance, SSB will be generated directly at 9MHz using a DDS modulator with audio processing being performed in a companion DSP that also performs receive DSP functions.

  There will also be the facility to drive the transceiver from a computer.

  Each month, a separate module will be described. At present, there is no intention to supply PCB, although we will think again if demand warrants it. Layouts etc. will, however, be available from the Warrington Amateur Radio Club Web site [1].

  References

  1. http://www.warc.org.uk)/http://www.warc.org.uk
  2. RadCom January 1996 Technical Topics
  3. For details of this formula, see Radio Communication Handbook, sixth edition page 6.10
  4. Hands Electronics - http://www.rf-kits.demon.co.uk
  5. Available from suppliers such as Mainline, or see the Motorola website http://www.motorola.com
  6. A High Performance AGC/IF Subsystem = QST May 1996 pp39